1. Field of the Invention
The present invention relates to a read only memory capable of writing data called a PROM (Programmable Read only Memory), particularly to an EEPROM (Electrically Erasable PROM) which is a read only storage element capable of writing data by an electrical operation and to the method of writing/reading data.
2. Description of Related Art
FIG. 1 is a block diagram showing a configuration of a conventional PROM as a read only memory capable of writing data, built in a general microcomputer.
In FIG. 1, reference numeral 1 designates a memory cell array as a memory unit for holding data, in which plural memory cells 1a are arranged in a state of matrix of row.times.column direction.
The memory cell array 1 is connected to a data bus DB through a data writing/reading (W/R) circuit 2 which is to be described later. In respective memory cells 1a, values of respective bits of respective data inputted from the data bus DB are written by the data writing/reading circuit 2, while the respective values stored in the respective memory cells 1a are read out to the data bus DB as the values of respective bits of the data.
Respective memory cells 1a in the memory cell array 1 are arranged in a state of matrix, as aforementioned. The memory cells 1a in the respective rows (columns) direction are connected to the respective common word lines 7, and the respective memory cells 1a in the respective columns (rows) direction are connected to the respective common bit lines 6. Accordingly, each memory cell 1a is connected to any one word line 7 and any one bit line 6.
Each word line 7 is connected to a word select circuit 20 and each bit line 6 is to the data writing/reading circuit 2.
To the data writing/reading circuit 2, a data read signal (hereinafter to be called a DR signal) line 3, a data writing pulse signal (hereinafter to be called a PGM signal) line 4 and a power source line 5 are connected.
The power source line 5 supplies a data writing voltage V.sub.pp to the data writing/reading circuit 2. When the DR signal given to the data writing/reading circuit 2 by the DR signal line 3 becomes active, data is read from the respective memory cells 1a of one row (column) connected to one word line 7 of the memory cell array 1 to the data writing/reading circuit 2. When the PGM signal given to the memory cell array 1 by the PGM signal line 4 becomes low ("L") level, the power source line 5 is selectively connected to the bit line 6 into which data "0" is to be written, and data writing voltage V.sub.pp is outputted.
The operation at the time of data writing of the conventional PROM so configured as aforementioned is as follows.
At first, data to be stored in the memory cell array 1 is given to the data writing/reading circuit 2 from the data bus DB, and at the same time, an address signal indicating an address of the memory cell array 1 in which the data is to be stored is given to a decoder (not shown) from the outside.
Responsive to the decode result of the address signal given from the outside, the word select circuit 20 selects one word line 7, thereby respective memory cells 1a of one row (column) connected to the selected word line 7 are accessed.
Next, when the PGM signal given by the PGM signal line 4 becomes "L" level, the data writing/reading circuit 2 fixes the electric potential of the bit line 6 connected to the memory cell 1a, into which data "0" is to be written, at the data writing voltage V.sub.pp given from the power source line 5. While the PGM signal keeps "L" level, electric current is made to flow between the source and drain of each memory cell 1a, thereby data writing is performed.
Each operation of the data writing, in other words, electric current I.sub.pp necessary for writing data in each row (column) of the memory cell array 1 is determined by the number of bits of "0" in the data to be written in each row (column) of the memory cell array 1. Therefore, when all of the bits of the data to be written in one row (column) are "0" the electric current I.sub.pp becomes maximum
Since, usually the electric current I.sub.pp necessary for writing one data "0" is 1 mA or so, when, for example, data is written in the memory cell array 1 in 16 bits unit, the maximum value of the electric current I.sub.pp is about 16 mA.
On the other hand, the operation at the time of data reading is as follows.
At first, an address signal, indicating an address of the memory cell 1a in which data to be read from the memory cell array 1, is given to the decoder (not shown) from the outside.
Responsive to the decode result of the address signal given from the outside, the word select circuit 20 selects one word line 7, thereby the respective memory cells 1a of one row (column) of the memory cell array 1 connected to the selected word line 7 are accessed.
Next, when the DR signal given form the DR signal line 3 becomes active, the data writing/reading circuit 2 reads signals (data) stored in the respective memory cells 1a of one row (column) connected to the word line 7 selected by the word select circuit 20 and outputs it to the data bus DB.
In the conventional PROM, that is, in the read only memory capable of writing data, since data is written in such a way as aforementioned, when all of the bits of the data to be written are "0" in an operation of writing data, the electric current I.sub.pp for writing data "0" becomes maximum. On the other hand, aluminum width of the power source line, which supplies the data writing voltage V.sub.pp is required to have a width which allows the maximum value of the aforementioned data writing current I.sub.pp and the current to be consumed increases. And when length of the data to be written in the PROM is enlarged, from 16 bits to 32 bits, for example, it is necessary to enlarge the aluminum width of the power source line correspondingly, and the current to be consumed also increases proportionally.